Company: Arteris, Campbell, CA
Company Description: Arteris is a leading provider of system IP for the acceleration of system-on-chip (SoC) development across today’s electronic systems. Arteris network-on-chip (NoC) interconnect IP and SoC integration technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics so its customers can focus on dreaming up what comes next.
Nomination Category: Company / Organization Categories
Nomination Sub Category: Technical Innovation of the Year - At Organizations With Up to 1,000 Employees
 Nomination Title: Arteris: Accelerating The Creation of Semiconductors
- Which will you submit for your nomination in this category, a video of up to five (5) minutes in length about the achievements of the nominated organization since 1 January 2021, OR written answers to the questions for this category? (Choose one):
Written answers to the questions
- If you are submitting a video of up to five (5) minutes in length, provide the URL of the nominated video here, OR attach it to your entry via the "Add Attachments, Videos, or Links to This Entry" link above, through which you may also upload a copy of your video.
- If you are providing written answers for your submission, you must provide an answer to this first question: Briefly describe the nominated organization: its history and past performance (up to 200 words):
Total 199 words used.
Arteris is a leading technology provider for the acceleration of semiconductor creation across today’s electronic systems. Arteris network-on-chip (NoC) interconnect intellectual property (IP) and system-on-chip (SoC) integration software enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics for all things electronic.
Founded in 2004, Arteris is the pioneer of network-on-chip (NoC) technology which enables the connectivity fabric on a semiconductor. The technology innovation ensures engineering teams conquer complexity and deliver new electronic systems and devices efficiently and effectively. Semiconductors are an essential industry in modern society and Arteris is the foundational connectivity fabric inside modern electronics across automotive, AI, enterprise computing, consumer electronics, communications and industrial markets.
The rapid pace of innovation has triggered an explosion in the number of processing blocks used in a semiconductor chip, amplified by continuous advancements in manufacturing technologies and core SoC development economics. Modern times call for modern methods for developing SoCs, and Arteris is at the heart of it.
Arteris has over 250 employees across the globe. Our technology is the connectivity fabric in over 3 billion SoCs on the market today. Anywhere you find complex electronic systems, you are likely to find Arteris.
- If you are providing written answers for your submission, you must provide an answer to this second question: Outline the organization's achievements since the beginning of 2021 that you wish to bring to the judges' attention (up to 250 words):
Total 237 words used.
In Q1-2023 Arteris introduced FlexNoc 5 Physically Aware Network-on-Chip Interconnect IP for the acceleration of semiconductor creation.
FlexNoC 5 enables architecture teams, logic designers and integrators to incorporate physical constraint management across power, performance and area (PPA) to deliver a physically aware IP connecting the system-on-chip (SoC). This technology enables 5X faster physical convergence over manual refinements with fewer iterations from the layout team for automotive, communications, consumer electronics, enterprise computing, and industrial applications.
Manual workflows typically include numerous iterations of pipeline insertions, effort-intensive creation of constraints for physical placement of units, and lengthy NoC placement plus route iterations to converge on the SoC PPA targets. By contrast, FlexNoC 5 physical awareness eliminates these iterations and shortens the duration of various manual steps, facilitating up to 5X faster physical convergence of the back-end physical design time and effort. The resulting physically optimized NoC IP instance is then ready for output to physical synthesis and place and route for implementation.
Without physical awareness, companies developing semiconductors or systems-on-chip, run the risk of developing SoC architectures that are difficult or even impossible to place and route resulting in multiple turns, overall project delay risks, and additional project costs, particularly for geometries of 16nm and below. With FlexNoC 5, engineers can consider the physical effects early in the process, delivering physically aware NoC IP which helps ensure their companies meet PPA goals and execute SoC projects on schedule and budget.
- If you are providing written answers for your submission, you must provide an answer to this third question: Explain why the achievements you have highlighted are unique or significant. If possible compare the achievements to the performance of other players in your industry and/or to the organization's past performance (up to 250 words):
Total 247 words used.
Semiconductor complexity is growing as the industry increasingly moves from integrated circuits (ICs) that process data, to SoCs that make decisions. Today’s electronic systems and devices, such as mobile phone application processors, contain many more IP blocks and consequently required more sophisticated on-chip communications.
With the rise of machine learning algorithms and architectures, it has unleashed demand for complex decision-making SoCs for applications such as automated driving and enterprise computing data center acceleration. Integration of processors, accelerators, machine learning subsystems, sophisticated multi-channel memories, and an ever-larger number of interface standards have placed a premium on the ability to move data efficiently inside the SoC and between SoC chiplets. Arteris interconnect IP provides this connectivity fabric.
These trends further highlight the growing importance of interconnect IP that is physically aware in today’s SoCs. Increasing chip design complexity leads to rising costs. The need for more functionality and performance has necessitated new architectural paradigms and accelerated the move to more advanced process nodes. This has resulted in the adoption of significantly more expensive and complex chip design methods and manufacturing processes, creating a substantial rise in semiconductor design costs. Costs are projected to continue to rise as the number of IP blocks on an SoC are projected to increase more than 20% from 2021 to 2024 according to Semico Research, placing increasing importance on the cost efficiencies provided by Arteris technology.
We are the pioneers of network-on-chip technology with 59 issues patents and 73 patent applications on the technology.
- You have the option to answer this final question: Reference any attachments of supporting materials throughout this nomination and how they provide evidence of the claims you have made in this nomination (up to 250 words):
Total 28 words used.
Arteris Announces FlexNoC 5 Press Release
FlexNoC 5 teaser video
FlexNoC 5 product page
FlexNoC 5 datasheet
Arteris case study – Sondrel
Arteris case study – SiMa.ai
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